TM 11-6625-3025-14/ET 426-AA-MMA-010/E154 VII210/T.O. 33A1-8-902-1-1
Table 6-20. Multiburst Clock Wiring Interconnections
Connector
Pin
Function
Destination
Z
Burst 5
Resolution (5), Pin P
Y
Burst 7
Resolution (7), Pin P
X
Burst 9
Resolution (9), Pin P
W
Stop Pulse A
Multiburst, Pin W, Pin E
V
--
U
Ground
Ground Buss
T
Multiburst On (+5v)
Multiburst, Pin R; Resolution,
Pin M; Control Panel, S2, Resolution Mode
S
Burst 10
Resolution (10), Pin P
R
Burst 8
Resolution (8), Pin P
P
Burst 6
Resolution (6), Pin P
N
Burst 4
Resolution (4), Pin P
M
Burst 2
Resolution (2), Pin P
L
-Ref Pulse
Multiburst, Pin N
K
Ref On (+5v)
Control Panel, S2, Resolution Mode
J
Clock In
Multiburst, Pin M
H
-H Gate In
Pulse Input, Pin L; Gray Scale Control, Pin F
F
--
E
-5v
Power Regulator, Pin A; Resolution,
Pin U, Pin J; Multiburst, Pin S;
Polarity, Pin W; Pulse Input, Pin W;
Chassis, TB2-4; Heat Sink, Left Side, -5v
D
--
C
+Ref Pulse
Multiburst, Pin L
B
Burst 1
Resolution (1), Pin P
A
Burst 3
Resolution (3), Pin P
6-85
