TM 11-6625-3025-14/ET426-AA-MMA-010/E154 VII210/T.O. 33A1-8-902-1-1
The V stripe pattern is the horizontal component of the window pattern presented for the entire vertical dimension
of the raster. This pattern is obtained by operating the H window card with the V window card not energized.
The H stripe pattern is the vertical component of the window pattern presented for the complete horizontal scan
line. In this case the V window card is operated without the H window card energized.
The window pattern is developed when both the H window and V window cards are energized. Outputs are routed
through Q12 (pin L on both cards) to common load resistor R29 on the polarity card (figure FO-9). The mixture of H stripe
and V stripe components results in the window pattern, a square at the center of the display raster.
H window and V window cards feature monostable multivibrators with a constant current charging network to
provide a wide control range. A control network is provided on each of these cards for adjustment of position and size;
bias resistors R16 and R17, current control transistor Q5, and current limiting resistor R15 on the H window card are
components typical of control range circuitry.
In the H window card a trigger spike is developed from the negative input horizontal gate through isolation diode
CR1, inverter Q1 and differentiator C1. The spikes are applied to a bias network and subsequently through the input
horizontal gate through differentiating capacitor C1. The spikes are applied to a bias network and subsequently through
diode CR3 to the monostable multivibrator Q4 and Q7, which determines the time from the left edge of the raster to
start of the window. The end of this cycle develops a trigger through isolation stage Q3 to start monostable Q8 and Q11
which develops the horizontal window segment. The output is routed through control circuitry CR5 and R36 to output
stage Q12.
The position of the window in the vertical plane (from the top of the raster) is developed by multivibrator Q1 and
Q4 on the V window card, whose cycle rate is determined by constant current control transistor Q2 and divider R4 and R5.
The window spacing (width) is developed similarly by monostable Q8 and Q11 as controlled by R30 and R36. The pulses
must be locked to the horizontal line rate to prevent a drift or visible "run through" of pattern as displayed. Horizontal rat e
triggers are routed through diode CR4 and blanked by CR3 until the monostable position cycle is complete. The bistable
Q6 and Q7 was started by the -V gate signal, and is returned to original state by triggers submitted through C4 and CR6.
The transition of -V position signal at the collector of Q7 is routed through CR9, C8 and CR8 to start monostable Q8 and
Q11, whose cycle time duration is set by C7, Q9 and divider R30 and R36. Bistable Q13 and Q14 is allowed to operate
during this time, as CR15 does not blank out horizontal rate triggers passed through CR14. The bistable Q13 and Q14
starts at the start of each line (triggered through CR11) and stops at the end of the line (triggered through CR12).
4-18
