TM 11-6625-3025-14/ET426-AA-MMA-010/E154 VII210/T.O. 33A1-8-902-1-1
The ring counter will have completed a cycle within one active tv line time, but not absolutely. Therefore provision
is included to reset the ring counter to the initial state at the end of each line. A positive H gate signal is routed to pin P to
inverter Z6B, where it is inverted and routed to clear all ring counter elements.
Usually it is desirable to generate black level during the horizontal and vertical blanking intervals and at the start of
each line continuously until the second step occurs; bistable multivibrator Z6C and Z6D is used for this purpose. The reset
pulse from Z6B sets the bistable to produce a positive dc level at Z6 (pin 8), causing stage Q10 to turn on and thereby
develop a black level digital signal. The bistable is forced to the other state by the output from ring counter step Z1B,
routed from card pin T to pin E. Black level is set in the analog gray scale channel by turning on Q9. Depending upon the
application, this can be through the blanking interval by connecting jumper 1-2 (the normal conditon) or only for duration of
the ring counter step 1 by connecting jumper 2-3.
4-8.
cards. The particular patterns are selected by logic circuits and pattern proportion is controlled by front panel controls.
Horizontal elements in the pattern are developed by the H bar card. This card contains an adjustable monostable
multivibrator Q5 and Q8 which determines the width between lines in the vertical dimension of the raster. At the end of the
monostable period, a gating condition exists at control transistors Q9 and Q10 which permits triggering of bistable
multivibrator Q11 and Q12 to the "on" state for one horizontal line period. The bistable is switched "on" at the start of an
active scanning line by h-rate triggers developed by Q15. Triggers developed through capacitor C7 and diode CR7 insure
that the bistable is returned in the "off" state at the end of each tv scanning line activated. At the end of this line the
monostable operation is again initiated through C2, prohibiting pattern generation for the duration of the monostable
period. The monostable active period is determined by the time required to charge capacitor C4 to a voltage level which
allows Q5 to conduct. The C4 rate of charge is determined by constant current network R26, and Q6 with current flow
established by voltage at the base of Q6 by divider R14 and R12. During the vertical blanking interval the monostable
circuit is clamped to a variable dc control level by a clamp circuit which employs the field effect transistor Q3 operating in
the enhancement mode. The controllable clamp level is established by Q4 and CR2 from the input voltage at pin D and
then connected to the base of Q5 through emitter-follower Q16 which determines position (phase) of the pattern on the
raster. Transistors Q1 and Q2 develop the clamp control pulse to control field effect Q3. This pulse swings from +5v to -
5v, developing nearly zero impedance across Q3 when the pulse is at the +5v level. Therefore, operation is locked
positively to the vertical and horizontal pattern elements.
4-14