TM 11-6625-3025-14/ET426-AA-MMA-010/E154 VII210/T.O. 33A1-8-902-1-1
4-7.
Gray Scale. The gray scale function involves the following circuit cards:
a. Gray Scale Control. Clock signal development and analog gray scale output signal processing (figure FO-10).
b. Gray Scale. Ring counter to clock off location of each gray scale step (figure FO-11).
The gray scale signal is developed by the gray scale control and gray scale cards. The -H Gate input
synchronizing signal is applied to gray scale control card (pin F) through an isolating diode (CR1) to emitter-follower control
stage Q1, which phase locks an astable multivibrator to develop the rate at which bars will be developed. During the active
television line a high level is present at the emitter of Q1 and diode CR2 is back-biased and non-conductive. Astable
multivibrator Q2 and Q5 operates at a rate established by C1 and C2 and the bias on current control transistors Q4 and
Q7. When the synchronizing pulse occurs, the emitter of Q1 goes negative causing CR2 to conduct. This pulls the base
voltage of Q2 negative clamping operation of the astable in a predictable state throughout the duration of the synchronizing
pulse. When the sync pulse ends, diode CR2 again becomes non-conductive, the base voltage at Q2 charges linearily
through R5, Q7 and C1, until Q2 conducts, starting normal astable operation. The time interval of this constant current-
charging multivibrator is controlled by divider R1 and R2. Pulses developed by this astable multivibrator are used to control
an integrated circuit ring counter on the gray scale card which controls formation of the gray scale waveform.
The gray scale waveforms developed at R17 on the gray scale control card by the gray scale card is applied to an
isolation emitter-follower Q10 and a black level clipper Q11, which sets the black level at ground. The companion
transistor pair Q8 and Q9 sets the maximum white level as controlled by R23. The resultant signal is output from the card
through driver Q12 to the level control potentiometer on the front panel and subsequently to the video card.
The clock signals are routed to the gray scale card through pin N to gate Z6A, where it is processed to drive the
clock inputs of J-K flip-flops which make up a ring counter (Z1 thorugh Z5). The ring counter produces pulse sequentially
with the output "stepping over" one element for each cycle of the clock input. Integrated circuit J-K flip-flop Z3B is used to
develop pulses to start ring counter operation. Section Z3A develops the first pulse after blanking which normally is a
black level step at the start of the gray scale.
Gray scale steps are formed by saturating stage Q1 through Q8. The output pulse of Z1B at pin 9 is positive,
causing Q1 to turn on. The gray level is determined by the control (R1) setting. At the next clock cycle, transistor Q1 will
turn off, and Q2 will be turned on by the ouput of Z1A due to ring counter cycling. Then the gray scale level will be
determined by the setting of R2. This sequence continues through controls R3 through R8. The gray scale characteristic
is set by each control adjustment.
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